1. Field of the Invention
The present invention relates generally to a linear voltage regulator and, more particularly, to improving efficiency of a linear voltage regulator that employs an adaptive biasing circuit.
2. Description of the Related Art
As is well known, a linear voltage regulator is a device that is designed to receive an input voltage and provide a substantially constant output voltage at a desired level for a range of output load currents. In a typical application, an output voltage provided by a linear voltage regulator is used as a power supply voltage for other circuits, whose load current may vary over time with substantially instantaneous transitions from one current level to another current level. For example, a linear voltage regulator may supply power to one or more digital circuits of a device, e.g., a cellular telephone, a computer system, etc., whose digital circuits may or may not be functional at any given time. Thus, load currents for such devices can be relatively high in one clock cycle and relatively low in a next clock cycle. As digital circuits are designed to operate at higher frequencies, transitions between clock cycles become faster and transition times between different load current levels decrease.
A low-dropout (LDO) voltage regulator is a linear voltage regulator that maintains output voltage regulation even when an input voltage at an input terminal of the regulator is only marginally greater than a desired output voltage at an output terminal of the regulator. A relatively low-dropout voltage allows an LDO voltage regulator to operate over a wider range of input voltage levels and extends battery life in battery-powered systems, such as portable electronic devices and laptop computer systems. For example, as a battery voltage of a device gradually decreases during usage, an LDO voltage regulator facilitates operation of the device at lower battery voltages, which extends battery life between charging cycles. In an LDO voltage regulator, a power transistor is connected in series between an input terminal and an output terminal of the regulator. During operation of the regulator, the power transistor provides load current to the output terminal of the regulator. In high-speed applications, conventional LDO voltage regulators have traditionally employed a relatively high operating current to facilitate driving the power transistor at an acceptable speed. Unfortunately, LDO voltage regulators that operate using relatively high operating currents are inefficient from a current efficiency stand-point. Moreover, when employed in battery-powered systems, conventional LDO voltage regulators may substantially reduce battery life due to relatively high operating currents.
U.S. Pat. No. 6,522,111 (hereinafter “the '111 patent”) discloses a low-dropout (LDO) voltage regulator. To address fast transients in load current, the LDO voltage regulator of the '111 patent also employs an adaptive biasing circuit that provides an unlimited additional operating current, that tracks the load current, in response to an increase in the load current. With reference to FIG. 1 an LDO voltage regulator 100 is illustrated that employs a steady-state biasing circuit 104, which provides a steady-state operating current, and an unlimited adaptive biasing circuit 102, which provides an unlimited additional operating current according to the '111 patent. The steady-state biasing circuit 104 includes a current source I1 and a current mirror, which includes transistors M1 and M2. The transistor M1 conducts a sourced current (supplied by the current source I1) and the transistor M2 conducts the steady-state operating current, whose level is substantially the same as or a multiple of the sourced current depending on relative geometries of the transistors M1 and M2.
The unlimited adaptive biasing circuit 102 allows for a reduction in steady-state operating current for the regulator 100, while providing an unlimited additional operating current for transient load conditions. In operation, an error amplifier A1, based on comparisons of a reference voltage (VREF) and a feedback voltage (VFB), drives a power transistor M6 to achieve a desired output voltage (VOUT) substantially independent of load current (IL), over a load current range. In operation, when the load current increases substantially instantaneously from a relatively small value to a relatively large value, the output voltage at the output terminal of the regulator 100 drops unless the power transistor M6 conducts more load current and/or load capacitor (CL) supplies the instantaneous load current required.
In this application, the regulator 100 provides load regulation (i.e., an ability to maintain a substantially constant output voltage level under changing load conditions) by providing an indication of a load condition change to the error amplifier A1, via the feedback voltage (provided by a resistive divider including resistors R1 and R2). The error amplifier A1 drives the power transistor M6 harder when the output voltage is below a desired level. Conversely, the error amplifier A1 controls the power transistor M6 to decrease output voltage when the output voltage is above a desired level. To improve transient response time of the LDO voltage regulator 100 to changing load conditions, the unlimited adaptive biasing circuit 102 temporarily increases an operating current of the error amplifier A1 to facilitate faster charging (or discharging) of a gate capacitance of the power transistor M6. The unlimited adaptive biasing circuit 102 includes a current mirror, which includes transistors M3 and M4, and a sense transistor M5. The sense transistor M5 conducts a sensed current that is a sub-multiple of the output load current conducted by the power transistor M6. The transistor M4 conducts the sensed current and the transistor M3 conducts an unlimited additional operating current, whose level is substantially the same as or a multiple of the sensed current, depending on relative geometries of the transistors M3 and M4.
Implementing the unlimited adaptive biasing circuit 102 within the regulator 100 allows a designer to decrease steady-state operating current of the error amplifier A1, while still providing satisfactory transient performance for the regulator 100 during load current transients. As such, the regulator 100 is generally more efficient than conventional LDO voltage regulators that do not employ an unlimited adaptive biasing circuit. However, the regulator 100 provides an unlimited additional operating current, which is based on and tracks the load current. As such, the unlimited adaptive biasing circuit 102 may increase operating currents to unnecessary levels during transients in the load current, thus, decreasing the efficiency of the regulator 100.
What is needed is a linear voltage regulator that provides acceptable transient response while utilizing a limited additional operating current.
In the following detailed description of exemplary embodiments of the invention, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific exemplary embodiments in which the invention may be practiced.